Netrace
Dependency-Tracking Trace-Based Network-on-Chip Simulation
Next-generation processors, including chip multiprocessors (CMPs) and systems-on-chip (SOCs), aim to incorporate tens or hundreds of cores on a single chip. Computer architecture researchers need ways to efficiently and effectively evaluate the performance of communication resources on these chips, which present significant challenges in terms of component complexity and interaction.
Netrace is a set of tools and traces designed to enhance the performance and fidelity of traditional trace-based network-on-chip simulation. The trace reader library can be easily incorporated into new or existing network simulators, as it exports a simple application programmer interface for reading packets and enforcing dependencies between packets in simulation. We also provide a set of traces collected in from a CMP running PARSEC binaries under Linux.
For more information, contact:
Joel Hestness
hestness <at> cs.wisc.edu
Documentation
The Netrace Technical Report includes details about using Netrace within network simulation:
J. Hestness, S. W. Keckler. "Netrace: Dependency-Tracking Traces for Efficient Network-on-Chip Experimentation." Technical Report TR-10-11, The University of Texas at Austin, Department of Computer Science, May 2011.
If you use the Netrace tools in a publication, please cite this technical report
Publications
J. Hestness, B. Grot, S. W. Keckler. "Netrace: Dependency-Driven, Trace-Based Network-on-Chip Simulation." 3rd International Workshop on Network on Chip Architectures (NoCArc). Dec. 2010. (PDF)
Download
Netrace Library Source Code:
This package contains the Netrace source code, which is a C library, source code for an application to view traces, as well as other example code for how to use Netrace. For more details about how to use the Netrace library, see our technical report.
Netraces v1.0:
blackscholes simlarge (907M)
blackscholes simmedium (182M)
blackscholes simsmall (55M)
bodytrack simlarge (3.5G)
canneal simmedium (3.5G)
dedup simmedium (4.1G)
ferret simmedium (2.7G)
fluidanimate simlarge (1.8G)
fluidanimate simmedium (677M)
fluidanimate simsmall (317M)
swaptions simlarge (3.0G)
vips simmedium (3.1G)
x264 simmedium (5.1G)
x264 simsmall (1.2G)
Each trace is split into 5 different regions of execution. Region 0 is a short period of execution before the benchmark starts running. Region 1 is the warm-up portion of the benchmark, during which it is reading inputs and setting up threads. Region 2 is the PARSEC defined region of interest (ROI) which represents the parallel portion of the application. Region 3 is the end of the benchmark, during which it is writing results and cleaning up. Finally, region 4 is between the end of the benchmark and simulation exit.
Updates
We are currently supporting Netrace, and we will post updates here as they become available. If you have questions or comments, please contact Joel Hestness
Acknowledgement of Support
This material is based upon work supported by the National Science Foundation under Grant No. 0811056. Any opinions, findings, and conclusions or recommendations expressed in this material are those of the author(s) and do not necessarily reflect the views of the National Science Foundation.
Copyright © 2010-2011 Joel Hestness, The University of Texas at Austin. All rights reserved.