Vl-coretype
Representation of basic SystemVerilog data types like integer
and string, and also void.
This is a product type, introduced by deftagsum in support of vl-datatype.
Fields
- name — vl-coretypename-p
- Kind of primitive data type, e.g., byte, string,
etc.
- signedp — booleanp
- Only valid for integer types, indicates whether the integer
type is signed or not.
- pdims — vl-packeddimensionlist
- Only valid for integer vector types (bit, logic, reg). If present
these are for an 'packed' array dimensions, i.e., the [7:0] part
of a declaration like bit [7:0] memory [255:0]. There can be
arbitrarily many of these.
- udims — vl-packeddimensionlist
- Unpacked array dimensions.
Subtopics
- Make-vl-coretype
- Basic constructor macro for vl-coretype structures.
- Vl-coretype->udims
- Get the udims field from a vl-coretype.
- Vl-coretype->pdims
- Get the pdims field from a vl-coretype.
- Vl-coretype->signedp
- Get the signedp field from a vl-coretype.
- Vl-coretype->name
- Get the name field from a vl-coretype.
- Change-vl-coretype
- Modifying constructor for vl-coretype structures.