Vl-coretype
A built-in SystemVerilog datatype like integer, string,
void, etc., or an array of such a type.
This is a product type, introduced by deftagsum in support of vl-datatype.
Fields
- name — vl-coretypename-p
- Kind of primitive datatype, e.g., byte, string,
etc.
- pdims — vl-dimensionlist
- Only valid for integer vector types (bit, logic, reg). If
present, these are the 'packed' array dimensions, i.e., the
[7:0] part of a declaration like bit [7:0] memory [255:0].
There can be arbitrarily many of these.
- udims — vl-dimensionlist
- Unpacked array dimensions, for instance, the [255:0] part
of a declaration like bit [7:0] memory [255:0]. There can
be arbitrarily many of these.
- signedp — booleanp
- Only valid for integer types. Roughly indicates whether the
integer type is signed or not. Usually you shouldn't use this;
see vl-datatype-arithclass instead.
Subtopics
- Vl-coretypename-p
- Basic kinds of datatypes.
- Make-vl-coretype
- Basic constructor macro for vl-coretype structures.
- Vl-coretype->udims
- Get the udims field from a vl-coretype.
- Vl-coretype->signedp
- Get the signedp field from a vl-coretype.
- Vl-coretype->pdims
- Get the pdims field from a vl-coretype.
- Vl-coretype->name
- Get the name field from a vl-coretype.
- Change-vl-coretype
- Modifying constructor for vl-coretype structures.