|
|
|---|
|
|
|
|---|
Warnings about comments like
Designs may occasionally contain special comments that certain synthesis tools not to process a particular region.
These special comments are not part of the SystemVerilog standard and we regard them as bad form. VL does not give such comments any special treatment and will act as though they are regular comments that have no effect on semantics.
As a special measure, VL looks for suspicious comments to try to at least
warn you about them. It should generally be straightforward to replace these
with appropriate