Mlib
Module Library -- A collection of various functions for
working with Verilog modules.
Subtopics
- Scopestack
- Scopestacks deal with namespaces in SystemVerilog by tracking the
bindings of names in scopes. They provide a straightforward, correct way to
look up identifiers.
- Hid-tools
- Functions for working with hierarchical identifiers.
- Filtering-by-name
- Functions for filtering lists of parsed objects by their names.
- Vl-interface-mocktype
- Create a datatype that corresponds to an already-elaborated
interface.
- Stripping-functions
- Functions for throwing away attributes, widths, locations, etc., so
that expressions and module elements can be compared using equal.
- Genblob
- An abstraction that is useful for processing generate
constructs.
- Expr-tools
- Basic functions for working with expressions.
- Extract-vl-types
- Extract Verilog data types to access them with ACL2 functions
- Hierarchy
- Functions for working with the hierarchy of dependencies between
Verilog descriptions.
- Range-tools
- Basic functions for working with ranges.
- Finding-by-name
- Functions for looking up and reordering parsed objects by their
names.
- Stmt-tools
- Additional functions for working with statements.
- Modnamespace
- Functions related to a module's namespace.
- Flat-warnings
- Extract flat lists of warnings from various design elements.
- Reordering-by-name
- Functions for reordering lists of parsed objects by their names.
- Datatype-tools
- Functions for working with datatypes.
- Syscalls
- Functions for working with system functions like $bits and
$random.
- Allexprs
- Functions for gathering all the expressions used throughout some
module item.
- Lvalues
- Tools for gathering up lvalues and checking the well-formedness of
expressions in lvalue positions.
- Port-tools
- Basic functions for working with arguments and ports.
