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• Parser

Parse-asserts

Functions for parsing SystemVerilog assertions.

Subtopics

Vl-parse-0+-assertion-variable-declarations

Parse { assertion_variable_declaration } .

Vl-parse-property-formal-type-and-id

Parse property_formal_type id.

Vl-parse-assertion-item

Parse an assertion_item into a vl-modelement-p.

Vl-parse-sequence-declaration

Parse sequence_declaration.

Vl-parse-property-declaration

Parse property_declaration.

Vl-parse-sequence-port-item

Parse sequence_port_item.

Vl-parse-property-port-item

Parse property_port_item.

Vl-parse-1+-sequence-port-items

Parse sequence_port_item { ',' sequence_port_item }.

Vl-parse-1+-property-port-items

Parse property_port_item { ',' property_port_item }.

Vl-make-assertion-vardecls

Vl-plausible-start-of-assertion-item-p

Vl-parse-assertion-item-looks-concurrent-p