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Functions for parsing parameter declarations.
See the comments in vl-paramdecl and also especially in vl-paramtype for details on how we represent parameter declarations. Here are the grammar rules from Verilog-2005:
local_parameter_declaration ::=
'localparam' ['signed'] [range] list_of_param_assignments
| 'localparam' parameter_type list_of_param_assignments
parameter_declaration ::=
'parameter' ['signed'] [range] list_of_param_assignments
| 'parameter' parameter_type list_of_param_assignments
parameter_type ::=
'integer' | 'real' | 'realtime' | 'time'
list_of_param_assignments ::= param_assignment { ',' param_assignment }
param_assignment ::= identifier = mintypmax_expression
SystemVerilog-2012 extends this in three ways.
First, it expands the valid types for value parameters, so that parameters can now be of any arbitrary data type. In particular:
local_parameter_declaration ::=
'localparam' data_type_or_implicit list_of_param_assignments
| ...
parameter_declaration ::=
'parameter' data_type_or_implicit list_of_param_assignments
| ...
data_type_or_implicit ::= data_type
| implicit_data_type
implicit_data_type ::= [ signing ] { packed_dimension }
signing ::= 'signed' | 'unsigned'
Second, it extends parameter assignments so that (1) the default value for non-local parameters becomes optional, and (2) there can be an arbitrary list of unpacked dimensions. However, I don't believe the meaning of these unpacked dimensions is ever explained, so VL does not support it. There is no place for these dimensions in our parsed representation, and our parser will fail to parse declarations that include such dimensions:
param_assignment ::= identifier { unpacked_dimension } [ '=' constant_param_expression ]
constant_param_expression ::= constant_mintypmax_expression | data_type | '$'
constant_mintypmax_expression ::=
constant_expression
| constant_expression : constant_expression : constant_expression
It is unclear to me what it would mean to assign a data type to a value parameter, so the parser currently does not support this.
The
Note that the omitting the default value for a parameter is not legal for local parameters. (SystemVerilog-2012, section A.10, note 18). We enforce this in the parser.
Finally, SystemVerilog-2012 adds completely new type parameters in addition to the value parameters above. The syntax here is:
local_parameter_declaration ::=
...
| 'localparam' 'type' list_of_type_assignments
parameter_declaration ::=
...
| 'parameter' 'type' list_of_type_assignments
list_of_type_assignments ::= type_assignment { ',' type_assignment }
type_assignment ::= identifier [ '=' data_type ]
Note that, as with value parameters, it is not legal to omit the default data type for a local type parameter. We enforce this in the parser.