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Parse-ports
Functions for parsing Verilog and SystemVerilog ports.
Subtopics
Parse-port-types
Handling of SystemVerilog-2012 port types.
Creating-portdecls/vardecls
Utilities for the initial creation of port declarations and (if the port declaration is complete) corresponding net declarations.
Verilog-2005-ports
Parsing for Verilog-2005 ports.
Sv-non-ansi-portdecls
Parsing of SystemVerilog-2012 non-ANSI port declarations.
Vl-parse-ansi-port-declaration-2005
Matches a port declaration (which may involve several comma-separated variable names), and creates an ansi-portdecl object for each of them.
Vl-parse-1+-port-declarations-separated-by-commas-2005
Verilog-2005 Only. Matches
port_declaration { ',' port_declaration }
in ansi style port lists. Creates ansi-portdecls.
Vl-parse-ansi-port-declaration
Matches
ansi_port_declaration
. Peeks at the token after to make sure it's a comma or right paren, but doesn't consume it.
Vl-parse-1+-ansi-port-declarations
Matches
{attribute_instance} ansi_port_declaration { ',' {attribute_instance} ansi_port_declaration }
Verilog-2005-portdecls
Parsing for Verilog-2005 port declarations.