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Sv
Vwsim
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Vl
Syntax
Loader
Preprocessor
Vl-loadconfig
Vl-loadstate
Lexer
Parser
Parse-expressions
Parse-udps
Parse-statements
Vl-parse-procedural-continuous-assignments
Vl-parse-task-enable
Vl-parse-event-trigger
Vl-parse-blocking-or-nonblocking-assignment
Vl-parse-tf-call
Vl-parse-subroutine-call-statement
Vl-parse-system-tf-call
Vl-make-case-statement
Vl-parse-system-task-enable
Vl-parse-operator-assignment/inc/dec
Vl-parse-disable-statement
Vl-filter-parsed-caseitemlist
Vl-parse-subroutine-call
Vl-parse-1+-id=expr-pairs
Vl-parse-case-keyword
Vl-actionblock
Vl-parse-1+-for-variable-declarations
Vl-parse-1+-for-init-assignments
Vl-parse-foreach-statement-array-part
Vl-parse-for-variable-declaration
Vl-parse-1+-for-step-assigns
Vl-maybe-parse-assert-deferral
Vl-parse-statement-2012-aux
Vl-parse-return-statement
Vl-parse-for-initialization
Vl-parse-unique-priority
Vl-parse-statement-top
Vl-parse-foreach-loop-variables
Vl-parse-case-statement
Vl-assign-op-expr
Vl-maybe-inject-block-name-into-assertion
Vl-parse-for-step
Vl-parse-concurrent-assertion-statement
Vl-parse-statement-wrapped
Vl-parse-statement-2005-aux
Vl-foreach-vardecls-from-loopvars
Vl-parse-immediate-assertion-statement
Vl-inc-or-dec-expr
Vl-parse-par-block
Vl-parse-seq-block
Vl-parse-statement-or-null
Vl-parse-procedural-assertion-statement
Vl-parse-action-block
Vl-parse-case-item
Vl-parse-expect-property-statement
Vl-parse-statement
Vl-parse-statement-aux
Vl-parse-1+-case-items
*vl-assignment-operators*
Parse-property
Vl-genelements
Parse-paramdecls
Parse-blockitems
Parse-utils
Parse-insts
Parse-functions
Parse-assignments
Parse-clocking
Parse-strengths
Vl-parse-genvar-declaration
Vl-parse
Parse-netdecls
Parse-asserts
Vl-maybe-parse-lifetime
Parse-dpi-import-export
Parse-ports
Parse-timeunits
Seq
Parse-packages
Parse-eventctrl
Vl-load-merge-descriptions
Vl-find-basename/extension
Vl-load-file
Vl-loadresult
Scope-of-defines
Vl-find-file
Vl-flush-out-descriptions
Vl-description
Vl-read-file
Vl-includeskips-report-gather
Vl-load-main
Extended-characters
Vl-load
Vl-load-description
Vl-descriptions-left-to-load
Inject-warnings
Vl-preprocess-debug
Vl-write-preprocessor-debug-file
Vl-read-file-report-gather
Vl-load-descriptions
Vl-load-files
Translate-off
Vl-load-read-file-hook
Vl-read-file-report
Vl-loadstate-pad
Vl-load-summary
Vl-collect-modules-from-descriptions
Vl-loadstate->warnings
Vl-iskips-report
Vl-descriptionlist
Warnings
Getting-started
Utilities
Printer
Kit
Mlib
Transforms
X86isa
Svl
Rtl
Software-verification
Math
Testing-utilities
Parser
Parse-statements
Functions for parsing Verilog and SystemVerilog procedural statements.
Subtopics
Vl-parse-procedural-continuous-assignments
Parse a
procedural_continuous_assignment
.
Vl-parse-task-enable
Parse a
task_enable
. Verilog-2005 Only.
Vl-parse-event-trigger
Parse an
event_trigger
.
Vl-parse-blocking-or-nonblocking-assignment
Parse a
blocking_assignment
or
nonblocking_assignment
.
Vl-parse-tf-call
Parse a
tf_call
. SystemVerilog-2012 Only.
Vl-parse-subroutine-call-statement
Parse a
subroutine_call_statement
. SystemVerilog-2012 only.
Vl-parse-system-tf-call
Parse a
system_tf_call
. SystemVerilog-2012 only.
Vl-make-case-statement
Final work to turn the parsed elements into a real case statement.
Vl-parse-system-task-enable
Parse a
system_task_enable
. Verilog-2005 Only.
Vl-parse-operator-assignment/inc/dec
Parses, e.g.,
a += 1
and returns
(a . (a + 1))
. Also handles
a++
and
++a
.
Vl-parse-disable-statement
Parse a
disable_statement
.
Vl-filter-parsed-caseitemlist
Split a list of cases into default and non-default cases.
Vl-parse-subroutine-call
Parse a
subroutine_call
. SystemVerilog-2012 only.
Vl-parse-1+-id=expr-pairs
Vl-parse-case-keyword
Parse a
case_keyword
into a
vl-casetype-p
.
Vl-actionblock
Temporary structure for parsing assertion statements.
Vl-parse-1+-for-variable-declarations
Vl-parse-1+-for-init-assignments
Vl-parse-foreach-statement-array-part
Vl-parse-for-variable-declaration
Vl-parse-1+-for-step-assigns
Vl-maybe-parse-assert-deferral
Parse
#0
or
final
, if present.
Vl-parse-statement-2012-aux
SystemVerilog-2012 Only. Main part of statement parsing.
Vl-parse-return-statement
Match
return [expression] ';
.
Vl-parse-for-initialization
Vl-parse-unique-priority
Parse a
unique_priority
into a
vl-casecheck-p
.
Vl-parse-statement-top
Vl-parse-foreach-loop-variables
Vl-parse-case-statement
Parse
case_statement
into a
vl-stmt-p
.
Vl-assign-op-expr
Normalized right-hand side of an assignment operator expression.
Vl-maybe-inject-block-name-into-assertion
Maybe install an outer block name like
foo : assert ...
into the assertion statement.
Vl-parse-for-step
Vl-parse-concurrent-assertion-statement
Parse a
concurrent_assertion_statement
, returning a
vl-cassertion
.
Vl-parse-statement-wrapped
Parse a statement or null, possibly with a label.
Vl-parse-statement-2005-aux
Verilog-2005 Only. Main part of statement parsing.
Vl-foreach-vardecls-from-loopvars
Vl-parse-immediate-assertion-statement
Parse an
immediate_assertion_statement
, returning a
vl-assertion
.
Vl-inc-or-dec-expr
Vl-parse-par-block
Parse a
par_block
into a
vl-blockstmt
.
Vl-parse-seq-block
Parse a
seq_block
into a
vl-blockstmt
.
Vl-parse-statement-or-null
Parse a
statement_or_null
into a
vl-stmt
, which is possible since we allow a
vl-nullstmt
as a
vl-stmt
.
Vl-parse-procedural-assertion-statement
Parse a
procedural_assertion_statement
, returning a
vl-stmt-p
.
Vl-parse-action-block
Parse an
action_block
into a
vl-actionblock-p
.
Vl-parse-case-item
Parse a
case_item
into a singleton
vl-caselist-p
.
Vl-parse-expect-property-statement
Parse a
expect_property_statement
, returning a
vl-cassertion
.
Vl-parse-statement
Top level function for parsing a (non-null)
statement
into a
vl-stmt
.
Vl-parse-statement-aux
Wrapper for parsing the rest of a statement after any attributes.
Vl-parse-1+-case-items
Parse
case_item { case_item }
into a
vl-caselist-p
.
*vl-assignment-operators*