Vl-paramvalue
Representation for the actual values given to parameters.
In Verilog-2005, the values for a parameterized module were always
ordinary expressions, e.g., 3 and 5 below.
myalu #(.delay(3), .width(5)) alu1 (...);
However, in SystemVerilog-2012 there can also be type parameters. For
instance, a valid instance might look like:
myalu #(.delay(3), .Bustype(logic [63:0])) myinst (...);
The vl-paramvalue-p is a sum-of-products style type that basically
corresponds to the SystemVerilog param_exprewssion grammar rule:
param_expression ::= mintypmax_expression | data_type | '$'
But note that $ is a valid vl-expr-p so this essentially
collapses into only two cases: expression or data type.
Subtopics
- Vl-paramvalue-p
- Recognizer for valid vl-paramvalue structures.
- Vl-paramvalue-fix
- Fixing function for vl-paramvalue structures.
- Vl-paramvalue-expr-p
- Fast recognizer for vl-paramvalues that are expressions.
- Vl-paramvalue-datatype-p
- Fast recognizer for vl-paramvalues that are expressions.
- Vl-paramvalue-case
- Case macro for vl-paramvalues.
