Generate a wide negation module.
(vl-make-n-bit-not n) → mods
We generate a module that is written using gates and which is semantically equivalent to:
module VL_N_BIT_NOT (out, in) ; output [N-1:0] out; input [N-1:0] in; assign out = ~in; endmodule
For instance, for a four-bit negation module, instead of the assignment above we would have:
VL_1_BIT_NOT bit0 (out[0], in[0]) ; VL_1_BIT_NOT bit1 (out[1], in[1]) ; VL_1_BIT_NOT bit2 (out[2], in[2]) ; VL_1_BIT_NOT bit3 (out[3], in[3]) ;
Function:
(defun vl-make-n-bit-not (n) (declare (xargs :guard (posp n))) (declare (xargs :guard t)) (let ((__function__ 'vl-make-n-bit-not)) (declare (ignorable __function__)) (b* ((n (lposfix n)) ((when (eql n 1)) (list *vl-1-bit-not*)) (name (hons-copy (cat "VL_" (natstr n) "_BIT_NOT"))) ((mv out-expr out-port out-portdecl out-vardecl) (vl-occform-mkport "out" :vl-output n)) ((mv in-expr in-port in-portdecl in-vardecl) (vl-occform-mkport "in" :vl-input n)) (out-wires (vl-make-list-of-bitselects out-expr 0 (- n 1))) (in-wires (vl-make-list-of-bitselects in-expr 0 (- n 1))) (insts (vl-simple-inst-list *vl-1-bit-not* "bit" out-wires in-wires))) (list (make-vl-module :name name :origname name :ports (list out-port in-port) :portdecls (list out-portdecl in-portdecl) :vardecls (list out-vardecl in-vardecl) :modinsts insts :minloc *vl-fakeloc* :maxloc *vl-fakeloc*) *vl-1-bit-not*))))
Theorem:
(defthm vl-modulelist-p-of-vl-make-n-bit-not (b* ((mods (vl-make-n-bit-not n))) (vl-modulelist-p mods)) :rule-classes :rewrite)
Theorem:
(defthm type-of-vl-make-n-bit-not (and (true-listp (vl-make-n-bit-not n)) (consp (vl-make-n-bit-not n))) :rule-classes :type-prescription)
Theorem:
(defthm vl-make-n-bit-not-of-pos-fix-n (equal (vl-make-n-bit-not (pos-fix n)) (vl-make-n-bit-not n)))
Theorem:
(defthm vl-make-n-bit-not-pos-equiv-congruence-on-n (implies (acl2::pos-equiv n n-equiv) (equal (vl-make-n-bit-not n) (vl-make-n-bit-not n-equiv))) :rule-classes :congruence)