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Vl-genelement

Vl-genif

An if or if/else generate construct.

This is a product type, introduced by deftagsum in support of vl-genelement.

Fields

test — vl-expr: Expression to test.
then — vl-genblock: The begin/end block for when test is true.
else — vl-genblock: The begin/end block for when test is false. May be an empty block if there is no else part.
loc — vl-location: Where this if came from in the Verilog source code.

These are mostly straightforward; note that each branch gets its own scope but that there are tricky scoping rules for nested if/else branches; see SystemVerilog-2012 Section 27.5 for details.

Subtopics

Make-vl-genif: Basic constructor macro for vl-genif structures.
Vl-genif->then: Get the then field from a vl-genif.
Vl-genif->test: Get the test field from a vl-genif.
Vl-genif->loc: Get the loc field from a vl-genif.
Vl-genif->else: Get the else field from a vl-genif.
Change-vl-genif: Modifying constructor for vl-genif structures.