scale.backend.sparc
Class SparcInstruction

java.lang.Object
  extended by scale.backend.Instruction
      extended by scale.backend.sparc.SparcInstruction
All Implemented Interfaces:
java.lang.Cloneable
Direct Known Subclasses:
AsiLitInstruction, CasaInstruction, FltCmpInstruction, FltOp2Instruction, FltOpInstruction, FtnOpInstruction, FtnOpLitInstruction, IlltrapInstruction, ImoveInstruction, ImoveLitInstruction, Inst7Instruction, Inst8Instruction, IntOpInstruction, IntOpLitInstruction, LoadInstruction, LoadLitInstruction, MembarInstruction, OpConInstruction, ReadRegInstruction, SethiInstruction, StoreInstruction, StoreLitInstruction, TrapInstruction, TrapLitInstruction, WriteRegInstruction, WriteRegLitInstruction

public abstract class SparcInstruction
extends Instruction

This is the base class for all Sparc instructions except branches.

$Id: SparcInstruction.java,v 1.23 2007-09-20 18:56:42 burrill Exp $

Copyright 2007 by the Scale Compiler Group,
Department of Computer Science
University of Massachusetts,
Amherst MA. 01003, USA
All Rights Reserved.

 Inst  Op Format                                Repr. Instruction           Class
 00    1  disp30                                call     label              CallInstruction
 01    0      -op2-const22                      illtrap  const22            IlltrapInstruction
 01    0    rd-op2-imm22                        sethi    const22,reg        SethiInstruction
 02    0  a-cond-op2-disp22                     fbcc     label              BranchInstruction
 03    0  a-cond-op2-cc1-cc0-p-disp19           fbpcc    %fccn,label        BranchCCInstruction
 04    0  a-rcnd-op2-d16hi-p- rs1-d16lo         brcc     reg,lab            BranchRegInstruction
 05    2    rd-op3- rs1-0-    -rs2              add      reg,reg,reg        IntOpInstruction
 05    3   fcn-op3- rs1-0-    -rs2              ldfsr    reg+reg,%fsr       FtnOpInstruction
 06    2    rd-op3- rs1-1-simm13                add      reg,imm,reg        IntOpLitInstruction
 06    3   fcn-op3- rs1-1-simm13                prefetch reg+address,fcn    FtnOpLitInstruction
 07    2      -op3-    -0-                      flushw                      SparcInstruction
 07    2      -op3- rs1-0-    -rs2              flush    reg+reg            Inst7Instruction
 07    2      -op3- rs1-0-    -rs2              return   reg+reg            ReturnInstruction
 08    2      -op3- rs1-1-simm13                flush    reg+address        Inst8Instruction
 08    2      -op3- rs1-1-simm13                return   reg+address        ReturnLitInstruction
 09    2    rd-op3- rs1-0-rcnd-    -rs2         movrcc   reg,reg,reg        IntOpInstruction
 10    2    rd-op3- rs1-1-rcnd-simm10           movrcc   reg,simm10,reg     IntOpLitInstruction
 11    3    rd-op3- rs1-0-    -rd2              casa     reg,%asi,reg,reg   CasaInstruction
 12    2  0000-op3-000f-0-    -cmask-mmask      membar   mask               MembarInstruction
 13    3    rd-op3- rs1-0- asi-rd2              casa     reg,asi,reg,reg    AsiLitInstruction
 14    2  imp1-op3-imp2                         impdep   const22            IlltrapInstruction
 15    2    rd-op3- rs1-0-    -rs2              sll      reg,reg,reg        IntOpInstruction
 16    2    rd-op3- rs1-1-scnt32                sll      reg,scnt32,reg     IntOpLitInstruction
 17    2    rd-op3- rs1-1-scnt64                sllx     reg,scnt64,reg     IntOpLitInstruction
 18    2    rd-op3-    -opf-rs2                 fmovs    reg,reg            FltOpInstruction
 19    2  cc10-op3- rs1-opf-rs2                 fcmps    %fccn,reg,reg      FltCmpInstruction
 20    2    rd-op3- rs1-opf-rs2                 fadds    reg,reg,reg        FltOp2Instruction
 21    2    rd-op3- rs1-                        rdpr     preg,reg           ReadRegInstruction
 21    2  0000-op3-000f-0000-                   stbar                       SparcInstruction
 22    2  000x-op3-                             done                        SparcInstruction
 24    2  cond-op3- rs1-0-cc1-cc0-    -rs2      tcc      %icc,reg+reg       TrapInstruction
 26    2    rd-op3-cc2-cond-0-cc1-cc0-    -rs2  movcc    %cc,reg,reg        ImoveInstruction
 27    2    rd-op3-cc2-cond-1-cc1-cc0-simm11    movcc    %cc,simm11,reg     ImoveLitInstruction
 28    2  cond-op3- rs1-1-cc1-cc0-    -swtn     tcc      %icc,reg+swtn      TrapLitInstruction
 29    2    rd-op3- rs1-rcnd-opf_low-rs2        fmovrcc  reg,reg,reg        FltOp2Instruction
 30    2    rd-op3-cond-opf_cc-opf_low-rs2      fmovscc  %cc,reg,reg        FmoveInstruction
 
The Inst references Figures 33 & 34 on pages 64 & 65 of the Sparc Architecture Manual Version 9.


Field Summary
protected  int opcode
          the instruction opcode
protected  byte setCC
          flags that specify the condition codes set by the instruction
protected  byte useCC
          flags that specify the condition codes used by the instruction
 
Constructor Summary
SparcInstruction(int opcode)
           
 
Method Summary
 java.lang.String assembleDisp(Assembler asm, Displacement disp, int ftn)
          Generate a String representation of a Displacement that can be used by the assembly code generater.
 void assembler(Assembler gen, Emit emit)
          Insert the assembler representation of the instruction into the output stream.
 boolean canBeDeleted(RegisterSet registers)
          Return true if the instruction can be deleted without changing program semantics.
 boolean defs(int register, RegisterSet registers)
          Return true if the instruction sets the register.
 int getOpcode()
          Return the numeric opcode of the instruction.
protected  boolean independentCC(SparcInstruction inst)
          Return true if this instruction's CC use is independent of the specified instruction.
 int instructionSize()
          Return the number of bytes required for the instruction.
 void remapRegisters(int[] map)
          Map the virtual registers referenced in the instruction to the specified real registers.
protected  void setOpcode(int opcode)
           
 boolean setsCC(int cc)
          Return true if the instruction sets the CC flag specified.
 void setSetCC(int cc)
          Specify the CC set by this instruction.
 boolean setsSpecialReg()
          Return true if this instruction has a side effect of changing a special register.
 void setUseCC(int cc)
          Specify the CCs used by this instruction.
 void specifyRegisterUsage(RegisterAllocator rs, int index, int strength)
          Specify the registers used and defined by this instruction.
 java.lang.String toString()
           
 boolean uses(int register, RegisterSet registers)
          Return true if the instruction uses the register.
 boolean usesCC(int cc)
          Return true if the instruction uses the CC flag specified.
 
Methods inherited from class scale.backend.Instruction
clone, copy, ehash, getBBID, getCopyDest, getCopySrc, getDestRegister, getExecutionCycles, getFunctionalUnit, getLoopNumber, getNext, getPredicate, getPredicates, getSrcRegisters, getTag, independent, isBranch, isCopy, isLabel, isLoad, isMandatory, isMarker, isPhi, isPredicated, isPredicatedOnTrue, isPrefetch, isSpillInstruction, isSpillLoadPoint, isSpillStorePoint, isStore, markSpillInstruction, mods, nullified, nullify, numPredicates, remapDestRegister, remapSrcRegister, removePredicates, setBBID, setLoopNumber, setMandatory, setNext, setPredicate, setPredicate, setPredicatedOnTrue, setPredicates, setTag, specifyNotSpillLoadPoint, specifySpillStorePoint
 
Methods inherited from class java.lang.Object
equals, finalize, getClass, hashCode, notify, notifyAll, wait, wait, wait
 

Field Detail

opcode

protected int opcode
the instruction opcode


setCC

protected byte setCC
flags that specify the condition codes set by the instruction


useCC

protected byte useCC
flags that specify the condition codes used by the instruction

Constructor Detail

SparcInstruction

public SparcInstruction(int opcode)
Parameters:
opcode - is the instruction's opcode
Method Detail

getOpcode

public int getOpcode()
Description copied from class: Instruction
Return the numeric opcode of the instruction. This opcode may be an encoding of the actual instruction opcode.

Specified by:
getOpcode in class Instruction

setOpcode

protected void setOpcode(int opcode)

uses

public boolean uses(int register,
                    RegisterSet registers)
Return true if the instruction uses the register.

Overrides:
uses in class Instruction

defs

public boolean defs(int register,
                    RegisterSet registers)
Return true if the instruction sets the register.

Overrides:
defs in class Instruction

instructionSize

public int instructionSize()
Description copied from class: Instruction
Return the number of bytes required for the instruction.

Specified by:
instructionSize in class Instruction
Returns:
the number of bytes required for the BranchRegInstruction

setSetCC

public final void setSetCC(int cc)
Specify the CC set by this instruction.


setUseCC

public final void setUseCC(int cc)
Specify the CCs used by this instruction.


setsCC

public final boolean setsCC(int cc)
Return true if the instruction sets the CC flag specified.

Parameters:
cc - specifies the CC

setsSpecialReg

public boolean setsSpecialReg()
Return true if this instruction has a side effect of changing a special register. An example would be a condition code register for architectures that set the condition and tehn branch on it such as the Sparc.

Overrides:
setsSpecialReg in class Instruction

usesCC

public final boolean usesCC(int cc)
Return true if the instruction uses the CC flag specified.

Parameters:
cc - specifies the CC

independentCC

protected final boolean independentCC(SparcInstruction inst)
Return true if this instruction's CC use is independent of the specified instruction. If instructions are independent, than one instruction can be moved before or after the other instruction without changing the semantics of the program.

Parameters:
inst - is the specified instruction

specifyRegisterUsage

public void specifyRegisterUsage(RegisterAllocator rs,
                                 int index,
                                 int strength)
Specify the registers used and defined by this instruction. Uses must be specified before definitions.

Specified by:
specifyRegisterUsage in class Instruction
Parameters:
rs - is the register set in use
index - is an index associated with the instruction
strength - is the importance of the instruction
See Also:
RegisterAllocator.useRegister(int,int,int), RegisterAllocator.defRegister(int,int)

remapRegisters

public void remapRegisters(int[] map)
Description copied from class: Instruction
Map the virtual registers referenced in the instruction to the specified real registers. The mapping is specified using an array that is indexed by the virtual register to return the real register.

Specified by:
remapRegisters in class Instruction
Parameters:
map - maps from the virtual register to real register

canBeDeleted

public boolean canBeDeleted(RegisterSet registers)
Return true if the instruction can be deleted without changing program semantics.

Overrides:
canBeDeleted in class Instruction

assembleDisp

public java.lang.String assembleDisp(Assembler asm,
                                     Displacement disp,
                                     int ftn)
Generate a String representation of a Displacement that can be used by the assembly code generater.


assembler

public void assembler(Assembler gen,
                      Emit emit)
Insert the assembler representation of the instruction into the output stream.

Specified by:
assembler in class Instruction

toString

public java.lang.String toString()
Overrides:
toString in class java.lang.Object